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  1 ? fn7197.1 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or 1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. copyright ? intersil americas inc. 2004, 2006. all rights reserved. elantec is a registered trademark of elantec semiconductor, inc. all other trademarks mentioned are the property of their respective owners. el5397a triple 200mhz fixed gain amplifier with enable the el5397a is a triple channel, fixed gain amplifier with a bandwidth of 200mhz, making these amplifiers ideal for today?s high speed video and monitor applications. the el5397a features internal gain setting resistors and can be configured in a gain of +1, -1 or +2. the same bandwidth is seen in both gain-of-1 and gain-of-2 applications. with a supply current of just 4ma per amplifier and the ability to run from a single supply voltage from 5v to 10v, these amplifiers are also ideal for hand held, portable or battery powered equipment. the el5397a also incorporates an enable and disable function to reduce the supply current to 100a typical per amplifier. allowing the ce pin to float or applying a low logic level will enable the amplifier. for applications where board space is critical, the el5397a is offered in the 16 ld qsop package, as well as a 16 ld so (0.150"). the el5397a is specified for operation over the full industrial temperature range of -40 c to +85 c. pinout el5397a [16 ld so (0.150"), 16 ld qsop] top view features ? gain selectable (+1, -1, +2) ? 200mhz -3db bandwidth (a v = 1, 2) ? 4ma supply current (per amplifier) ? single and dual supply operation, from 5v to 10v or 2.5v to 5v ? fast enable/disable ? available in 16 ld qsop package ? single (el5197) available ? 400mhz, 9ma products available (el5196 and el5396) applications ? battery-powered equipment ? hand-held, portable devices ? video amplifiers ? cable drivers ? rgb amplifiers ? test equipment ? instrumentation ? current to voltage converters 1 2 3 4 16 15 14 13 5 6 7 12 11 10 8 9 - + ina+ cea vs- ceb inb+ nc cec inc+ ina- outa vs+ outb inb- nc outc inc- - + - + ordering information part number part marking tape & reel package pkg. dwg. # el5397acs el5397acs - 16 ld so (0.150") mdp0027 el5397acs-t7 el5397acs 7? 16 ld so (0.150") mdp0027 el5397acs-t13 el5397acs 13? 16 ld so (0.150") mdp0027 el5397acu 5397acu - 16 ld qsop mdp0040 EL5397ACU-T7 5397acu 7? 16 ld qsop mdp0040 el5397acu-t13 5397acu 13? 16 ld qsop mdp0040 data sheet november 8, 2006 n o t r e c o m m e n d e d f o r n e w d e s i g n s s e e e l 5 3 0 6
2 fn7197.1 november 8, 2006 absolute maxi mum ratings (t a = +25c) supply voltage between v s + and v s - . . . . . . . . . . . . . . . . . . . . . 11v maximum continuous output current . . . . . . . . . . . . . . . . . . . 50ma operating junction temperature . . . . . . . . . . . . . . . . . . . . . . +125c power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . see curves pin voltages. . . . . . . . . . . . . . . . . . . . . . . . . v s - -0.5v to v s + +0.5v storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c operating temperature . . . . . . . . . . . . . . . . . . . . . . .-40c to +85c caution: stresses above those listed in ?absolute maximum ratings? may cause permanent damage to the device. this is a stress o nly rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. important note: all parameters having min/max specifications are guaranteed. typical values are for information purposes only. u nless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: t j = t c = t a electrical specifications v s + = +5v, v s - = -5v, r l = 150 , t a = +25c unless otherwise specified. parameter description conditions min typ max unit ac performance bw -3db bandwidth a v = +1 200 mhz a v = +2 200 mhz a v = -1 200 mhz bw1 0.1db bandwidth 20 mhz sr slew rate v o = -2.5v to +2.5v, a v = +2 1800 2100 v/s t s 0.1% settling time v out = -2.5v to +2.5v, av = -1 12 ns c s channel separation f = 5mhz 67 db e n input voltage noise 4.8 nv/ hz i n - in- input current noise 17 pa/ hz i n + in+ input current noise 50 pa/ hz dg differential gain error (note 1) a v = +2 0.03 % dp differential phase error (note 1) a v = +2 0.04 dc performance v os offset voltage -10 1 10 mv t c v os input offset voltage temperature coefficient measured from t min to t max 5v/c a e gain error v o = -3v to +3v -2 2 % r f , r g internal r f and r g 320 400 480 input characteristics cmir common mode input range 3v 3.3v v +i in + input current -80 1 80 a -i in - input current -50 1 50 a r in input resistance 45 k c in input capacitance 0.5 pf output characteristics v o output voltage swing r l = 150 to gnd 3.4v 3.7v v r l = 1k to gnd 3.8v 4.0v v i out output current r l = 10 to gnd 95 120 ma supply i son supply current - enabled no load, v in = 0v 3 4 5 ma i soff supply current - disabled no load, v in = 0v 100 150 a el5397a
3 fn7197.1 november 8, 2006 psrr power supply rejection ratio dc, v s = 4.75v to 5.25v 55 75 db -ipsr - input current power supply rejection dc, v s = 4.75v to 5.25v -2 2 a/v enable t en enable time (note 2) 40 ns t dis disable time (note 2) 600 ns i ihce ce pin input high current ce = v s +0.86a i ilce ce pin input low current ce = v s -0-0.1a v ihce ce input high voltage for power- down v s + -1 v v ilce ce input low voltage for power-up v s + - 3 v notes: 1. standard ntsc test, ac signal amplitude = 286mv p-p , f = 3.58mhz 2. measured from the application of ce logic until the output voltage is at the 50% point between initial and final values electrical specifications v s + = +5v, v s - = -5v, r l = 150 , t a = +25c unless otherwise specified. (continued) parameter description conditions min typ max unit el5397a
4 fn7197.1 november 8, 2006 typical performance curves frequency response (gain) 1m 10m 100m 1g 6 2 -2 -6 -14 frequency (hz) normalized magnitude (db) a v =2 a v =1 a v =-1 r l =150 frequency response (phase), all gains 1m 10m 100m 1g frequency (hz) phase () r l =150 90 0 -90 -180 -270 -360 -10 frequency response for various c l 1m 10m 100m 1g 14 10 6 2 -6 frequency (hz) normalized magnitude (db) a v =2 r l =150 22pf added 10pf added 0pf added group delay vs frequency 1m 10m 100m 1g 3.5 3 2 1 0 frequency (hz) delay (ns) a v =2 a v =1 r l =150 frequency response for various common-mode input voltages 1m 10m 100m 1g 6 -2 -6 -10 -14 frequency (hz) normalized magnitude (db) a v =2 r l =150 3v 0v -3v 2.5 1.5 0.5 -2 2 transimpedance (rol) vs frequency 1k frequency (hz) 10k 100k 1m 10m 100m 1g 10m 100 1k 10k 100k 1m phase magnitude ( ) -90 -180 -270 -360 0 phase () rol el5397a
5 fn7197.1 november 8, 2006 typical performance curves (continued) psrr and cmrr vs frequency psrr/cmrr (db) frequency (hz) 20 -80 -60 -40 -20 0 10k 100k 1m 10m 1g 100m -3db bandwidth vs supply voltage 56 8 10 250 200 150 100 total supply voltage (v) -3db bandwidth (mhz) a v =2 r l =150 peaking vs supply voltage 5 4 3 2 0 total supply voltage (v) peaking (db) a v =2 a v =-1 a v =1 r l =150 79 a v =-1 a v =1 56 8 10 79 1 -3db bandwidth vs temperature -40 10 60 160 300 250 200 100 0 ambient temperature (c) -3db bandwidth (mhz) r l =150 peaking vs temperature 1 0.8 0.4 0.2 0 ambient temperature (c) peaking (db) r l =150 110 150 50 0.6 -40 10 60 160 110 voltage and current noise vs frequency 100 frequency (hz) 1k 10k 100k 10m 1m i n + i n - e n voltage noise (nv/ hz) current noise (pa/ hz) 1k 1 10 100 psrr+ psrr- cmrr el5397a
6 fn7197.1 november 8, 2006 typical performance curves (continued) closed loop output impedance vs frequency frequency (hz) output impedance ( ) 100 0.001 0.1 10 0.01 1 supply current (ma) 10 0 8 6 0 supply voltage (v) supply current vs supply voltage 12 210 8 6 4 2 4 100 10k 100m 1g 1m 10 frequency (mhz) 100 input power intercept (dbm) 25 -10 15 20 -5 0 5 10 a v =+2 r l =150 two-tone 3rd order input refe rred intermodulation intercept (iip3) a v =+2 r l =100 2nd and 3rd harmonic distortion vs frequency 1 frequency (mhz) 10 100 harmonic distortion (dbc) -20 -80 -40 -60 -90 -50 -70 a v =+2 v out =2v p-p r l =100 3rd order distortion -30 0.03 0.02 0.01 0 -0.01 -0.02 -0.03 -0.04 -0.05 dg (%) or dp () -1 -0.5 0 0.5 1 dp dg a v =2 0.04 0.03 0.02 0.01 0 -0.01 -0.02 -0.03 -0.04 dg (%) or dp () -1 -0.5 0 0.5 1 dp dg a v =1 differential gain/phase vs dc input voltage at 3.58mhz dc input voltage differential gain/phase vs dc input voltage at 3.58mhz dc input voltage 1k 100k 10m 2nd order distortion el5397a
7 fn7197.1 november 8, 2006 typical performance curves (continued) 1 frequency (mhz) 10 100 output voltage swing (v pp ) 10 0 2 4 6 8 output voltage swing vs frequency thd<0.1% output voltage swing vs frequency thd<1% 1 frequency (mhz) 10 100 output voltage swing (v pp ) 10 0 2 4 6 8 r l =500 a v =2 large signal step response 1v/div 10ns/div v s =5v r l =150 a v =2 small signal step response settling time vs settling accuracy 25 20 15 10 0 settling time (ns) 0.01 0.1 1 settling accuracy (%) 5 a v =2 r l =150 v step =5v p-p output 200mv/div 10ns/div v s =5v r l =150 a v =2 transimpedance (roi) vs temperature 625 600 575 550 525 -40 10 60 110 160 die temperature (c) roi (k ) r l =150 r l =500 r l =150 a v =2 el5397a
8 fn7197.1 november 8, 2006 typical performance curves (continued) frequency response (gain) 8 ld so (0.150") package 1m 10m 100m 1g frequency (hz) normalized magnitude (db) 6 -2 -6 -10 -14 a v =1 r l =150 frequency response (phase) 8 ld so (0.150") package 1m 10m 100m 1g frequency (hz) phase () a v =2 a v =-1 r l =150 2 90 -90 -180 -270 -360 0 icmr and ipsr vs temperature 2 1.5 0.5 0 -0.5 -40 10 60 110 160 die temperature (c) icmr/ipsr (a/v) 1 psrr and cmrr vs temperature 90 70 50 40 30 20 10 -40 10 60 110 160 die temperature (c) psrr/cmrr (db) 60 offset voltage vs temperature 2 1 0 -1 -2 -40 10 60 110 160 die temperature (c) v os (mv) 80 psrr cmrr icmr+ ipsr icmr- input current vs temperature 60 40 20 -20 -40 -60 -40 10 110 160 die temperature (c) input current (a) 0 60 ib- ib+ el5397a
9 fn7197.1 november 8, 2006 typical performance curves (continued) typical performance curves (continued) negative output swing vs temperature for various loads -3.5 -3.6 -3.7 -3.9 -4 -4.1 -4.2 -40 10 110 160 die temperature (c) v out (v) -3.8 60 positive output swing vs temperature for various loads 4.2 4.1 4 3.8 3.7 3.6 3.5 -40 10 110 160 die temperature (c) v out (v) 3.9 60 positive input resistance vs temperature 60 50 30 20 10 0 -40 10 110 160 die temperature (c) r in + (k ) 40 60 supply current vs temperature 5 3 2 1 0 -40 10 110 160 die temperature (c) supply current (ma) 4 60 1k 150 1k 150 output current vs temperature 130 125 120 115 -40 10 60 110 160 die temperature (c) i out (ma) sink source slew rate vs temperature 4000 3500 3000 2500 -40 10 60 110 160 die temperature (c) slew rate (v/s) a v =2 r l =150 el5397a
10 fn7197.1 november 8, 2006 enable response 20ns/div 500mv/div 5v/div disable response 400ns/div 500mv/div 5v/div 1 0.9 0.7 0.3 0.2 0.1 0 0.5 0.8 0.6 0.4 -50 0 50 75 100 125 -25 25 -40 85 package power dissipation vs ambient temperature jedec jesd51-3 low effective thermal conductivity test board ambient temperature (c) power dissipation (w) 1.4 0.6 0.4 0.2 0 1 1.2 0.8 -50 0 50 75 100 125 -25 25 -40 85 package power dissipation vs ambient temperature jedec jesd51-7 high effective thermal conductivity test board ambient temperature (c) power dissipation (w) 1.250w 893mw s o 1 6 ( 0 . 1 5 0 ? ) 8 0 c / w qs o p 1 6 11 2 c / w 909mw 633mw s o 1 6 ( 0 . 1 5 0 ? ) 1 1 0 c / w q s o p 1 6 1 5 8 c / w el5397a
11 fn7197.1 november 8, 2006 pin descriptions 16 ld so (0.150") 16 ld qsop pin name function equivalent circuit 1 1 ina+ non-inverting input, channel a circuit 1 22cea chip enable, channel a circuit 2 3 3 vs- negative supply 44ceb chip enable, channel b (see circuit 2) 5 5 inb+ non-inverting input, channel b (see circuit 1) 6, 11 6, 11 nc not connected 77cec chip enable, channel c (see circuit 2) 8 8 inc+ non-inverting input, channel c (see circuit 1) 9 9 inc- inverting input, channel c (see circuit 1) 10 10 outc output, channel c circuit 3 12 12 inb- inverting input, channel b (see circuit 1) 13 13 outb output, channel b (see circuit 3) 14 14 vs+ positive supply 15 15 outa output, channel a (see circuit 3) 16 16 ina- inverting input, channel a (see circuit 1) r g r f in- in+ ce r f out el5397a
12 fn7197.1 november 8, 2006 applications information product description the el5397a is a triple channel fixed gain amplifier that offers a wide -3db bandwidth of 200mhz and a low supply current of 4ma. the el5397a works with supply voltages ranging from a single 5v to 10v and they are also capable of swinging to within 1v of either supply on the output. this combination of high bandwidth and low power, together with aggressive pricing make the el5397a the ideal choice for many low-power/high-bandwidth applications such as portable, handheld, or bat tery-powered equipment. for varying bandwidth and higher gains, consider the el5191 with 1ghz on a 9ma su pply current or the el5193 with 300mhz on a 4ma supply current. versions include single, dual, and triple amp packages with 5 ld sot-23, 16 ld qsop, and 8 ld or 16 ld so outlines. power supply bypassing and printed circuit board layout as with any high frequency device, good printed circuit board layout is necessary for optimum performance. low impedance ground plane construction is essential. surface mount components are recommended, but if leaded components are used, lead lengths should be as short as possible. the power supply pins must be well bypassed to reduce the risk of oscillation. the combination of a 4.7f tantalum capacitor in parallel with a 0.01f capacitor has been shown to work well when placed at each supply pin. disable/power-down the el5397a amplifier can be di sabled placing its output in a high impedance state. when disabled, the amplifier supply current is reduced to < 150a. the el5397a is disabled when its ce pin is pulled up to within 1v of the positive supply. similarly, the amplifier is enabled by floating or pulling its ce pin to at least 3v below the positive supply. for 5v supply, this means that an el5397a amplifier will be enabled when ce is 2v or less, and disabled when ce is above 4v. although the logic levels are not standard ttl, this choice of logic voltages allows the el5397a to be enabled by tying ce to ground, even in 5v single supply applications. the ce pin can be driven from cmos outputs. gain setting the el5397a is built with internal feedback and gain resistors. the internal feedback resistors have equal value; as a result, the amplifier can be configured into gain of +1, -1, and +2 without any external resistors. figure 1 shows the amplifier in gain of +2 configuration. the gain error is 2% maximum. figure 2 shows the amplifier in gain of -1 configuration. for gain of +1, in+ and in- should be connected together as shown in figure 3. this configuration avoids the effects of any parasitic capacitance on the in- pin. since the internal feedback and gain resistors change with temperature and process, exte rnal resistor should not be used to adjust the gain settings. supply voltage range and single-supply operation the el5397a has been designed to operate with supply voltages having a span of greater than or equal to 5v and less than 11v. in practical terms, this means that the el5397a will operate on dual supplies ranging from 2.5v to 5v. with single-supply, the el5397a will operate from 5v to 10v. as supply voltages continue to decrease, it becomes necessary to provide input an d output voltage ranges that can get as close as possible to the supply voltages. the el5397a has an input range wh ich extends to within 2v of either supply. so, for example, on 5v supplies, the el5397a has an input range which spans 3v. the output range of the el5397a is also qui te large, extending to within 1v of the supply rail. on a 5v supply, the output is therefore capable of swinging from -4v to +4v. single-supply output range is larger because of the increased negative swing due to the external pull-down resistor to ground. figure 4 shows figure 1. a v = +2 - + 400 400 in- in+ figure 2. a v = -1 - + 400 400 in- in+ figure 3. a v = +1 - + 400 400 in- in+ el5397a
13 fn7197.1 november 8, 2006 an ac-coupled, gain of +2, +5v single supply circuit configuration. video performance for good video performance, an amplifier is required to maintain the same output impedance and the same frequency response as dc levels are changed at the output. this is especially difficult when driving a standard video load of 150 , because of the change in output current with dc level. previously, good differential gain could only be achieved by running high idle currents through the output transistors (to reduce variati ons in output impedance.) these currents were typically comparable to the entire 4ma supply current of each el5397a amplifier. special circuitry has been incorporated in the el5397a to reduce the variation of output impedance with current output. this results in dg and dp specifications of 0.03% and 0.04, while driving 150 at a gain of 2. video performance has also been measured with a 500 load at a gain of +1. under these conditions, the el5397a has dg and dp specificat ions of 0.03% and 0.04, respectively. output drive capability in spite of its low 4ma of supply current, the el5397a is capable of providing a minimum of 95ma of output current. with a minimum of 95m a of output drive. driving cables and capacitive loads when used as a cable driver, double termination is always recommended for reflection-free performance. for those applications, the back-termination series resistor will decouple the el5397a from the cable and allow extensive capacitive drive. however, other applications may have high capacitive loads without a back- termination resistor. in these applications, a small series resistor (usually between 5 and 50 ) can be placed in series with the output to eliminate most peaking. current limiting the el5397a has no internal current-limiting circuitry. if the output is shorted, it is possible to exceed the absolute maximum rating for output current or power dissipation, potentially resulting in the destruction of the device. power dissipation with the high output drive capabi lity of the el5397a, it is possible to exceed the +125c absolute maximum junction temperature under certain very high load current conditions. generally speaking when r l falls below about 25 , it is important to calculate the maximum junction temperature (t jmax ) for the application to determine if power supply voltages, load conditions, or package type need to be modified for the el5397a to remain in the safe operating area. these parameters are calculated as follows: where: t max = maximum ambient temperature ja = thermal resistance of the package n = number of amplifiers in the package pd max = maximum power dissipation of each amplifier in the package pd max for each amplifier can be calculated as follows: where: v s = supply voltage i smax = maximum supply current v outmax = maximum output voltage (required) r l = load resistance figure 4. - + 400 400 v in +5 0.1f 1k 1k 0.1f +5 v out t jmax t max ja npd max () + = pd max 2 ( v s i smax ) v s ( - v outmax ) v outmax r l ---------------------------- + = el5397a
14 fn7197.1 november 8, 2006 el5397a small outline package family (so) gauge plane a2 a1 l l1 detail x 4 4 seating plane e h b c 0.010 b m ca 0.004 c 0.010 b m ca b d (n/2) 1 e1 e n n (n/2)+1 a pin #1 i.d. mark h x 45 a see detail ?x? c 0.010 mdp0027 small outline package family (so) symbol so-8 so-14 so16 (0.150?) so16 (0.300?) (sol-16) so20 (sol-20) so24 (sol-24) so28 (sol-28) tolerance notes a 0.068 0.068 0.068 0.104 0.104 0.104 0.104 max - a1 0.006 0.006 0.006 0.007 0.007 0.007 0.007 0.003 - a2 0.057 0.057 0.057 0.092 0.092 0.092 0.092 0.002 - b 0.017 0.017 0.017 0.017 0.017 0.017 0.017 0.003 - c 0.009 0.009 0.009 0.011 0.011 0.011 0.011 0.001 - d 0.193 0.341 0.390 0.406 0.504 0.606 0.704 0.004 1, 3 e 0.236 0.236 0.236 0.406 0.406 0.406 0.406 0.008 - e1 0.154 0.154 0.154 0.295 0.295 0.295 0.295 0.004 2, 3 e 0.050 0.050 0.050 0.050 0.050 0.050 0.050 basic - l 0.025 0.025 0.025 0.030 0.030 0.030 0.030 0.009 - l1 0.041 0.041 0.041 0.056 0.056 0.056 0.056 basic - h 0.013 0.013 0.013 0.020 0.020 0.020 0.020 reference - n 8 14 16 16 20 24 28 reference - rev. l 2/01 notes: 1. plastic or metal protrusions of 0.006? maximum per side are not included. 2. plastic interlead protrusions of 0.010? maximum per side are not included. 3. dimensions ?d? and ?e1? are measured at datum plane ?h?. 4. dimensioning and tolerancing per asme y14.5m - 1994
15 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn7197.1 november 8, 2006 el5397a quarter size outline plast ic packages family (qsop) 0.010 c a b seating plane detail x e e1 1 (n/2) (n/2)+1 n pin #1 i.d. mark b 0.004 c c a see detail "x" a2 44 gauge plane 0.010 l a1 d b h c e a 0.007 c a b l1 mdp0040 quarter size outline plastic packages family symbol qsop16 qsop24 qsop28 tolerance notes a 0.068 0.068 0.068 max. - a1 0.006 0.006 0.006 0.002 - a2 0.056 0.056 0.056 0.004 - b 0.010 0.010 0.010 0.002 - c 0.008 0.008 0.008 0.001 - d 0.193 0.341 0.390 0.004 1, 3 e 0.236 0.236 0.236 0.008 - e1 0.154 0.154 0.154 0.004 2, 3 e 0.025 0.025 0.025 basic - l 0.025 0.025 0.025 0.009 - l1 0.041 0.041 0.041 basic - n 16 24 28 reference - rev. e 3/01 notes: 1. plastic or metal protrusions of 0.006? maximum per side are not included. 2. plastic interlead protrusions of 0.010? maximum per side are not included. 3. dimensions ?d? and ?e1? are measured at datum plane ?h?. 4. dimensioning and tolerancing per asme y14.5m-1994.


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